This invention relates to power amplifiers and is more particularly directed to pulsed RF power amplifiers of the type in which several fets or other amplifying devices are combined together to amplify an RF input signal. The invention is more specifically directed to a technique of controlling the bias levels of the amplifying devices so that they are kept at a desired operating point in their active regions over a wide range of die temperature.
Transistors or other amplifying devices have an active region in which there is a substantially linear relationship between gate or grid voltage and drain or plate current. For example, in a linear Class A amplifier, a bias level is selected so that when a null signal is applied to the grid, gate or other control electrode, the output current is at a desired quiescent level in about the center of the linear part of the device's active region. Because operating characteristics such as threshold voltage, transconductance, etc., of the amplifying device will change, due to aging, temperature drift or other reasons, bias control techniques have been used to maintain a reasonably constant bias current in the transistors or other devices used in the gain stages of an RF power amplifier. One proposed bias control technique for an RF amplifier is described in Erb et al. U.S. Pat. No. 4,924,191.
Low power amplifiers can include a source degeneration resistor and a simple biasing network between drain and gate to provide a stable bias current. This lowers the available drain voltage, power gain and power output. However, high power devices tend to have much smaller gains than low power devices, and this requires an increased size and operating cost for the devices, when passive gain control techniques are used. Resistors in the source-drain path affect gain and create an output power loss. This is unacceptable in high power amplifiers where any power loss will result in the need for additional power stages or an increased number of paralleled devices.
It the high power amplifier is operated continuously, it can employ a technique that measures drain current and adjusts the gate voltage so as to keep constant the dc component of the drain current.
However, for many applications it is necessary for the amplifier to be designed for pulsed operation. In that case a static feedback network is not feasible to maintain a constant bias. This results because there is no current output flowing when the amplifier is gated off, so no bias measurement can be taken between pulses.
A previously proposed solution to this problem involves gating each amplifying device in turn while applying a null or zero input. The bias current for each device is measured and the results of this measurement are supplied to a processor that controls the respective bias levels. This technique requires a test mode, in which the amplifying elements are forward biased and a null input signal is applied. However, there is no provision for creating a null region for each occurrence of a pulsed input signal. Also, if the amplifier is to be operated in a continuous mode, the technique requires that a forced idle condition be imposed in turn on each of the amplifying elements. Thus, the effect is that the amplifier will not operate in a continuous mode.
This technique also has drawbacks in that it imposes unacceptable conditions on the user because of its forced idle requirement. Additionally, the feedback correction in this technique cannot prevent failure from thermal runaway for many types of transistors.
Another technique to control bias compensation is to employ a temperature compensation network. This corrects for thermal drift of the fet gate to source threshold voltage. This system has the advantages of operating whether the amplifier is used continuously or intermittently. However, because of its open-loop nature, this technique does suffer certain drawbacks. Each fet or other device requires adjustment to set the initial bias to the required level. This most often involves a potentiometer that is set by hand. Also, the thermal drift characteristic of each fet has to match, or an adjustment has to be made during manufacture to compensate for variance in thermal drift.
Recently some circuit designers have begun to consider high voltage mosfets for use in power amplifiers as a means to reduce cost and size of the amplifier. These fets, which are more commonly employed in switching power supplies, have a much more abrupt gate voltage to drain current characteristic than an RF power mosfet. This makes a simple thermal compensation scheme difficult and costly to implement. These low cost fets are also very sensitive to thermal variations, which can cause thermal runaway. If this sensitivity is not addressed adequately, destruction of the device can result. That is, threshold voltage change because of temperature change is a serious problem. The fact that the gate voltage to drain current characteristic is steeper and more abrupt as compared with RF power mosfets results in a faster, more extreme thermal runaway.
Additional problems arise where the high voltage mosfets are employed in a linear RF pulse power amplifier for low-band (5 to 25 MHZ) magnetic resonance imaging (MRI). When these fets are used, it is necessary not only to select an appropriate high voltage mosfet, but care must be exercised in design of the push-pull circuitry for each pair of transistors; thermal compensation of gate bias is needed to achieve dynamic linearity and gain stability. Thermal control of B+ supply, i.e. drain voltage, is required to achieve gain stability, and the cooling system must be optimally designed for management of heat, i.e., to cool the transistors evenly with highly efficient heat transfer.
The linear RF amplifier has to be designed so that each push-pull transistor pair amplifies evenly over the entire low band (5-25 MHz) with a high flatness characteristic around each given imaging frequency. The dynamic linearity must be maintained as high as possible over a wide range of pulse widths and duty cycles. That is, the output power to gain response over the specified dynamic range (40 dB) should be within a .+-.1.0 dB window.
Gain stability is defined as the variation of gain (for both long term and short term) at a specified peak RF output level. Gain stability should be maintained at .+-.0.2 dB for 15 minutes of operation, and at .+-.1.0 dB for 5000 hours of operation.
Phase stability is defined as variation of phase over the specified dynamic range and over time at a specific power level. The phase stability should be between .+-.2.degree. and .+-.5.degree. for short and long term, respectively.
Pulse droop is defined as the variation of peak RF output power over the pulse width for a specific output and duty cycle. Pulse droop should be within .+-.0.2 dB.
Pulse rise and fall times should be less than 25 .mu.sec, measured between the 10% and 90% levels of RF output.
The gated-on noise figure should be less than 27 dB for the overall system. This corresponds to less than -80 dBm/Hz gated-on output noise floor.
The gated-off noise figure should be no greater than 20 dB for the overall system, or a gated-off noise floor of less than -154 dBm/Hz.
The amplifier must be able to deliver the minimum specified power level into a variety of voltage standing wave ratio loads, or VSWRs. The amplifier must have maximum output power capability into mismatched loads, so as to be useful for initial MRI system calibration.
At the present time, solid-state amplifiers utilize RF power mosfets which are designed and characterized for linear RF applications. The highest design operating frequency is less than the transistor's specified maximum frequency. The transistor's internal capacitances, C.sub.ISS, C.sub.RSS and C.sub.OSS are all low and have negligible effect on the overall source and load impedances. The RF power mosfets typically operate at 50 volts drain to source, and a pair in push-pull can provide peak output power of 400 watts, with a power gain of 13 dB. A typical MRI application requiting five kilowatts of peak RF power needs, sixteen push-pull pairs.
On the other hand, high voltage mosfets, having a 400 volt breakdown characteristic and a 310 watt average dissipation capacity, can be operated at a nominal 85 volts drain to source, with a 10 dB power gain and 900 watts peak output power. This means that only eight push-pull pairs are needed to achieve a total peak output power of five kilowatts with a sufficient voltage breakdown margin to operate into high VSWRs. The mosfet has greater than a 4:1 drain to source breakdown margin for 85 volts drain voltage to avoid voltage breakdown. Meanwhile, the RF input drive power level is kept the same as for the rated output regardless of load mismatch.
Therefore, because of the higher power and impedance mismatch capability of the high voltage mosfets, and also because of the lower cost of these than the RF power mosfets, any power amplifier that implements the high voltage mosfets would be extremely attractive.
Because of gain stability and dynamic linearity problems, however, these transistors cannot simply be substituted in place of the RF power mosfets. Instead problems of drain bias stability, gain stability, and dynamic linearity must be taken into account. Means for dealing with these issues have not been addressed in the prior RF amplifier arts, even through the problems presented are by no means trivial.